Using UVM with ModelSim

ModelSim 10.1d supports all SystemVerilog/Verilog features except:

• SystemVerilog assertions

• SystemVerilog coverage

• randomize method

• program blocks

  • Dave Rich from Mentor does not recomment the use of program blocks for any user: http://go.mentor.com/programblocks

Out of the above, only the randomize method is used by the UVM library.

UVM can be used with ModelSim 10.1d as long as the following coding style adjustments are followed:

• When creating a uvm_sequence, put the following in the constructor: do_not_randomize = 1'b1;

  class my_sequence extends uvm_sequence #(my_transaction);
  
  function new();
    // MUST BE SET when using ModelSim
    do_not_randomize = 1'b1;
  endfunction
  

• Then, before sending the request in your sequence, if you need randomization, use $urandom or other classic ways to achieve randomization for your request

• Do NOT use `uvm_do*with macros

Examples on EDA Playground that you can edit and simulate:

• Simple UVM Testbench

• UVM Sequence-Driver