SystemC  2.3.1
Accellera SystemC proof-of-concept library
sc_clock_ports.h
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1 /*****************************************************************************
2 
3  The following code is derived, directly or indirectly, from the SystemC
4  source code Copyright (c) 1996-2014 by all Contributors.
5  All Rights reserved.
6 
7  The contents of this file are subject to the restrictions and limitations
8  set forth in the SystemC Open Source License (the "License");
9  You may not use this file except in compliance with such restrictions and
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16  *****************************************************************************/
17 
18 /*****************************************************************************
19 
20  sc_clock_ports.h -- The clock ports.
21 
22  Original Author: Martin Janssen, Synopsys, Inc., 2001-05-21
23 
24  CHANGE LOG IS AT THE END OF THE FILE
25  *****************************************************************************/
26 
27 #ifndef SC_CLOCK_PORTS_H
28 #define SC_CLOCK_PORTS_H
29 
30 
32 
33 namespace sc_core {
34 
35 // ----------------------------------------------------------------------------
36 // The clock ports.
37 //
38 // (Provided for backward compatibility reasons.)
39 // ----------------------------------------------------------------------------
40 
44 
45 } // namespace sc_core
46 
47 //$Log: sc_clock_ports.h,v $
48 //Revision 1.3 2011/08/26 20:45:39 acg
49 // Andy Goodrich: moved the modification log to the end of the file to
50 // eliminate source line number skew when check-ins are done.
51 //
52 //Revision 1.2 2011/02/18 20:23:45 acg
53 // Andy Goodrich: Copyright update.
54 //
55 //Revision 1.1.1.1 2006/12/15 20:20:04 acg
56 //SystemC 2.3
57 //
58 //Revision 1.2 2006/01/03 23:18:26 acg
59 //Changed copyright to include 2006.
60 //
61 //Revision 1.1.1.1 2005/12/19 23:16:43 acg
62 //First check in of SystemC 2.1 into its own archive.
63 //
64 //Revision 1.8 2005/06/10 22:43:55 acg
65 //Added CVS change log annotation.
66 //
67 
68 #endif
69 
70 // Taf!
sc_inout< bool > sc_inout_clk
sc_out< bool > sc_out_clk
sc_in< bool > sc_in_clk