Tutorial

This Quick Start is intended for users of http://www.edaplayground.com.

  1. In a separate web browser window, log in to EDA Playground at: http://www.edaplayground.com

  2. In either the Design or Testbench window pane, type in the following code:

    module test;
      initial
        $display("Hello World!");
    endmodule
    

    (Note: The code in the right Design pane is compiled first, followed by code in the left Testbench pane.)

  3. Click

    Run

    Yes, running a sim is as simple as that!

  4. In the bottom pane, you should see real-time results as your code is being compiled and then run. A run typically takes 1-5 seconds, depending on network traffic and simulator. Near the bottom of result output, you should see:

    Hello World!
    
  5. Now, let’s save our good work. Type in a descriptive name in the Details area on the left.

    Details-Name

    and click

    Save
  6. The browser page will reload and the browser address bar will change. This is a persistent link to your saved code. You can send the link by email, post it on a web page, post it on Stack Overflow forums, etc. Here is what the link looks like for one user’s Hello World! playground: http://www.edaplayground.com/s/3/12

  7. Now, let’s try modifying existing code. Load the following example: RAM

  8. On the left editor pane, before the end of initial block, add the following:

    write_enable = 1;
    data_write = 8'h2C;
    toggle_clk_write;
    toggle_clk_read;
    $display("data[%0h]: %0h",
      address_read, data_read);
    

    The above code will write new data and read it out again. ( address_read and address_write should be the same).

  9. Run the sim. In the results you should see this new message:

    data[1b]: 2c
    
  10. Optional. Click Copy to save a personal version of the modified RAM code, including the simulation results.

Loading Waves from EDA Playground

You can run a simulation on EDA Playground and load the resulting waves in EPWave.

Loading Waves for SystemVerilog and Verilog Simulations

  • Go to your code on EDA Playground. For example: RAM Design and Test

  • Make sure your code contains appropriate function calls to create a *.vcd file. For example:

    initial begin
      $dumpfile("dump.vcd");
      $dumpvars(1);
    end
    
  • Select a simulator and check the Open EPWave after run checkbox. (Not all simulators may have this run option.)

    _images/openEpwaveCheckbox.png
  • Click Run. After the run completes, the resulting waves will load in a new EPWave window. (Pop-ups must be enabled.)

Loading Waves for VHDL Simulations

  • Check the Open EPWave after run checkbox.
  • Specify the Top entity to simulate.
  • Click Run. After the run completes, the resulting waves will load in a new EPWave window. (Pop-ups must be enabled.)
    • The waves for all signals in the specified Top entity and any of its components will be dumped.
    • In EPWave window, click Get Signals to select the signals to view.

Verilog Synthesis on EDA Playground